Bachelor of Computer Application-Bus Organization
In this ppts and pdf we learn about how computer architecture work and we learn about. *Bus Organization *Combinational circuits *Sequential circuits *Instruction Cycle and many more
Input all positive nhi(1-999999999) print sum of digits
C programming to count sum of digits
INTEGRATED CIRCUITS
WE WILL DISCUSS ABOUT DIGITAL INTEGRATED CIRCUITS
Digital Image Processing Old Paper RTU
This PDF contains the questions that are asked in Rajasthan Technical University's Digital Image Processing.
DIGITAL ELECTRONICS old paper RTU
This pdf contains Rajasthan Technical University DIGITAL ELECTRONICS old paper RTU
Universal gates based circuit design
Universal gates based circuit design with examples
Application of Multiplexer
uses of multiplexer and its application
Half and Full Adder/ Subtractor
concepts of full adder subtractor and hakf adder with circuit design
Arithmetic circuits
An arithmetic circuit is a set of gates with a separate set of inputs for each number that has to be processed. The gates are connected so as to carry out an arithmetic action and the outputs of the gate circuit are the digits of the result
Asynchronous counter
Asynchronous counters are those whose output is free from the clock signal. Because the flip flops in asynchronous counters are supplied with different clock signals, there may be delay in producing output. The required number of logic gates to design asynchronous counters is very less
Sequential circuits
digital circuit theory, sequential logic is a type of logic circuit whose output depends not only on the present value of its input signals but on the sequence of past inputs, the input history as well. This is in contrast to combinational logic, whose output is a function of only the present input.
Verilog and HDL
Verilog is a Hardware Description Language; a textual format for describing electronic circuits and systems. Applied to electronic design, Verilog is intended to be used for verification through simulation, for timing analysis, for test analysis (testability analysis and fault grading) and for logic synthesis.